奇异摩尔（上海）半导体技术有限公司

1、公司介绍 About Kiwimoore: Kiwimoore is at the forefront of the semiconductor industry, pushing the boundaries with our innovative Chiplet technology. We are dedicated to advancing computing through a culture of collaboration, innovation, and dynamic teamwork. As part of Kiwimoore, you will join a team committed to redefining the future of semiconductor technology with some of the brightest minds in the industry. 关于奇异摩尔（Kiwimoore） 奇异摩尔处于半导体行业前沿，凭借创新的芯粒（Chiplet）技术不断突破技术边界。我们秉持协作、创新与高效团队合作的文化，致力于推动计算技术的发展。加入奇异摩尔，你将与行业内的顶尖人才携手，共同重新定义半导体技术的未来。 福利待遇：六险一金，双休，定期体检，节假日福利，弹性工作~ 工作地点：西安/上海 Job Title: Software/BSP Engineer Position Overview We are seeking an experienced BSP Engineer to be responsible for prototype verification of the chips & enabling underlying drivers and development the interface of upper level API & protocol stacks. In this role, you will work together with team to development software, especially for PCIE, high-speed Ethernet to ensure low-latency, high-throughput communication when silicon back. The ideal candidate will have deep experiences in networking technologies, AI server architectures or GPU based system development Key Responsibilities 1. Design, develop, and optimize BSP for embedded systems in network of AI servers, including hardware drivers, firmware, and low-level software. 2. Be responsibility for PCIe Gen٤.٠ above and high-speed Ethernet (e.g., ١٠٠G/٢٠٠G) driver development, ensuring low-latency, high-throughput communication. 3. Implement and development underlying drivers or API to support RDMA (Remote Direct Memory Access) technology to enhance network efficiency for distributed AI workloads 4. Develop embedded system toolchains using C++/Python for automated testing, system monitoring, and diagnostics. 5. Collaborate with hardware teams on chip bring-up, signal integrity analysis, and system validation, testing and troubleshooting of advanced networking chips. including silicon bring-up, debugging, and silicon characterization 6. Design and debug low-level chip protocol stacks (e.g., PCIe, DDR, SPI, I٢C, UART) for custom ASIC-based platforms. 7. Research AI server architectures and explore high-performance networking protocols (e.g., RoCEv٢, InfiniBand). Qualifications & Requirements • Educational Background： Master’s degree in Electrical Engineering, Computer Engineering, Computer Science, or related field. • Professional Experience 1. 5+ years of embedded systems development experience 2. Expertise in PCIe Gen4.0 above or with hands-on experience in high-speed interfaces like high-speed Ethernet 3. Deep understanding of RDMA principles and network architectures (TCP/IP, OSI model), with proven project experience. 4. Proven experience in chip bring-up, including bootloader customization, power-on sequencing, and hardware initialization for new silicon platforms. 5. Strong background in low-level protocol stack development (e.g., PCIe, USB, Ethernet PHY/MAC layers) and debugging with tools like oscilloscopes, logic analyzers, and protocol analyzers. 6. Exposure to UEFI/BIOS development, Secure Boot, or firmware security mechanisms 7. Proficiency in development tools: VSCode, MobaXterm, Git, Jira. 8. Strong C++ programming skills and Python scripting capabilities; familiarity with Linux kernel, Device Tree, and bare-metal programming. • Soft Skills 1. Team work spirit & Good communication skills 2. Strong problem-solving abilities, with a data-driven approach to troubleshooting. 3. Fluent in English (verbal and written); additional language skills are a plus. Why Join Us? • Cutting-Edge Technology: Work with industry-leading networking solutions that power the world’s most advanced data centers. • Influence & Impact: Shape the direction of products and solutions that will be used globally by top-tier enterprises. • Professional Growth: Lead a talented and passionate team, while enhancing your own technical expertise and leadership skills. • Dynamic Environment: Collaborate with cross-functional teams in a fast-paced, innovative setting. Join us to drive the future of networking solutions and make a lasting impact on next-generation data center architectures! 职位概述 我们正在寻找一位经验丰富的BSP工程师，负责芯片的原型验证，启用底层驱动程序，并开发上层API和协议栈的接口。 在这个职位上，你将与团队合作开发软件，特别是针对PCIE、高速以太网的软件，以确保硅片回片时的低延迟、高吞吐量通信。 理想的候选人应具备丰富的网络技术、AI服务器架构或基于GPU的系统开发经验。 主要职责 1. 为人工智能服务器网络中的嵌入式系统设计、开发和优化板级支持包（BSP），包括硬件驱动程序、固件和底层软件。 2. 负责PCIe Gen4.0及以上版本以及高速以太网（如100G/200G）的驱动开发，确保实现低延迟、高吞吐量的通信。 3. 实现并开发底层驱动程序或API，以支持RDMA（远程直接内存访问）技术，从而提高分布式人工智能工作负载的网络效率 4. 使用C++/Python开发嵌入式系统工具链，用于自动化测试、系统监控和诊断。 5. 与硬件团队合作，进行芯片启动、信号完整性分析以及高级网络芯片的系统验证、测试和故障排除，包括硅片启动、调试和硅片特性分析 6. 为基于定制ASIC的平台设计和调试低级芯片协议栈（如PCIe、DDR、SPI、I²C、UART）。 7. 研究人工智能服务器架构，并探索高性能网络协议（如RoCEv2、InfiniBand）。 资格与要求 • 教育背景：电气工程、计算机工程、计算机科学或相关领域的硕士学位。 专业经验 1. 5年以上的嵌入式系统开发经验 2. 具备PCIe Gen4.0以上的专业知识，或在高速以太网等高速接口方面有实践经验 3. 对RDMA原理和网络架构（TCP/IP、OSI模型）有深入理解，并有相关项目经验。 4. 在芯片启动方面拥有丰富经验，包括引导加载程序定制、上电顺序以及新硅平台的硬件初始化。 5. 在低层协议栈开发（如PCIe、USB、以太网PHY/MAC层）方面拥有扎实的背景知识，并熟练使用示波器、逻辑分析仪和协议分析仪等工具进行调试。 6. 熟悉UEFI/BIOS开发、安全引导或固件安全机制 7. 熟练使用开发工具：VSCode、MobaXterm、Git、Jira。 8. 具备扎实的C++编程技能和Python脚本编写能力；熟悉Linux内核、设备树和裸机编程。 软技能 1. 团队合作精神 & 良好的沟通技巧 2. 具备出色的解决问题的能力，能够采用数据驱动的方法进行故障排除。 3. 英语流利（口语和书面语）；掌握其他语言技能者优先。 为何加入我们？ • 尖端技术：采用业界领先的网络解决方案，为全球最先进的数据中心提供动力。 • 影响与冲击：塑造顶级企业将在全球范围内使用的产品和解决方案的发展方向。 • 职业发展：领导一支才华横溢且充满激情的团队，同时提升自己的技术专业知识和领导能力。 • 动态环境：在快节奏、创新的环境中与跨职能团队合作。 加入我们，共同推动网络解决方案的未来发展，为下一代数据中心架构带来深远影响！

1、公司介绍 About Kiwimoore: Kiwimoore is at the forefront of the semiconductor industry, pushing the boundaries with our innovative Chiplet technology. We are dedicated to advancing computing through a culture of collaboration, innovation, and dynamic teamwork. As part of Kiwimoore, you will join a team committed to redefining the future of semiconductor technology with some of the brightest minds in the industry. 关于奇异摩尔（Kiwimoore） 奇异摩尔处于半导体行业前沿，凭借创新的芯粒（Chiplet）技术不断突破技术边界。我们秉持协作、创新与高效团队合作的文化，致力于推动计算技术的发展。加入奇异摩尔，你将与行业内的顶尖人才携手，共同重新定义半导体技术的未来。 福利待遇：六险一金，双休，定期体检，节假日福利，弹性工作~ Role Overview: It is for front-end RTL development covering in AI based Networking product IP and SoC development, including specification and architecture definition, RTL Coding, IP integration and design quality assurance, for our projects. We are responsible for delivering cutting-edge, custom SoC designs that can perform complex and high-performance functions in the most efficient manner. 工作地点：西安/上海 Responsibilities: 1. Develop design documents． 2. Write RTL code, meet the function target and have good performance/power/area efficiency． 3. Apply low power, DFT and other digital design techniques． 4. Work with DV team to improve test plan and debug failed tests． 5. Work with ME/BE team in synthesis, P&R and STA. 6. Complete Lint/CDC checks and timing closure. 7. Participate in silicon debug． Qualifications: basic requirements： 1. BS with 6+ years or MS with 3+ years of design engineering experience. 2. High proficient in Verilog/System Verilog coding constructs. 3. Knowledge of front-end tools and flow (Verilog simulators, Connectivity tools, Lint/CDC checkers, low power static checkers) ． 4. Strong understanding of CDC and timing closure. Additional Preferred one or more of these Requirements: 1. Experience with AMBA protocols (CHI, CXS, AXI, AHB) and fabric (XBAR, NIC, NOC) design or third-party IP integration. 2. Experience in Ethernet, RDMA, DPU and AI networking development. 3. Ability to write scripts using Perl, Tcl, Python etc. 4. Familiarity with Synthesis and STA tools is a plus. 5. Good verbal and written communication skills. What Kiwimoore Offers: 1.A competitive salary and comprehensive benefits package. 2.Career growth opportunities in an innovative and dynamic field. 3.A creative, inclusive, and collaborative work environment. 4.The opportunity to be part of a pioneering team revolutionizing technology. How to Apply: If you are a dynamic professional looking to impact the tech world , apply now! Submit your application through our careers page, including a resume and a cover letter explaining why you are the perfect fit for the Design Engineer at Kiwimoore. Kiwimoore is an equal opportunity employer. We value diversity and are committed to creating an inclusive environment for all employees. All employment is decided based on qualifications, merit, and business need. 岗位概述 该岗位负责前端 RTL（寄存器传输级）开发，涵盖基于人工智能（AI）的网络产品 IP（知识产权）与 SoC（系统级芯片）开发工作，具体包括需求规格与架构定义、RTL 代码编写、IP 集成及设计质量保障，以支撑公司相关项目。我们的职责是交付具备尖端技术的定制化 SoC 设计，确保其能以最高效的方式实现复杂且高性能的功能。 岗位职责 1、编写设计文档。 2、编写 RTL 代码，满足功能目标，并确保良好的性能、功耗与面积（PPA）效率。 3、应用低功耗设计、可测试性设计（DFT）及其他数字设计技术。 4、与验证（DV）团队协作，完善测试计划并调试失败的测试案例。 5、与前端 / 后端（FE/BE）团队配合，开展综合（Synthesis）、布局布线（P&R）及静态时序分析（STA）工作。 6、完成代码检查（Lint）、跨时钟域（CDC）检查及时序收敛（Timing Closure）。 7、参与芯片（Silicon）调试工作。 任职要求--基本要求 1、本科及以上学历，本科需具备 6 年以上设计工程经验，硕士需具备 3 年以上设计工程经验。 2、精通 Verilog/System Verilog 硬件描述语言的编码规范与技巧。 3、熟悉前端设计工具与流程（包括 Verilog 仿真器、连接性分析工具、Lint/CDC 检查工具、低功耗静态检查工具）。 4、深入理解跨时钟域（CDC）设计与时序收敛（Timing Closure）相关知识。 优先要求（满足以下一项或多项者优先） 1、具备 AMBA 协议（如 CHI、CXS、AXI、AHB）及总线架构（如交叉开关 XBAR、网络接口控制器 NIC、片上网络 NOC）设计经验，或第三方 IP 集成经验。 2、拥有以太网（Ethernet）、远程直接数据存取（RDMA）、数据处理单元（DPU）及 AI 网络领域开发经验。 3、具备使用 Perl、Tcl、Python 等脚本语言编写工具脚本的能力。 4、熟悉综合（Synthesis）与静态时序分析（STA）工具者优先。 5、具备良好的口头与书面沟通能力。 我们可以给到您 具有竞争力的薪资及全面的福利体系。 在创新且充满活力的领域中，提供广阔的职业发展机会。 富有创造力、包容性与协作精神的工作环境。 加入先锋团队，参与技术变革的宝贵机会。 申请方式 若你是充满活力、渴望在科技领域创造影响力的专业人士，欢迎立即申请！请通过我们的招聘官网提交申请，申请材料需包含个人简历及求职信，求职信需说明你为何是奇维摩尔设计工程师岗位的理想人选。 奇异摩尔是一家倡导平等就业机会的雇主。我们重视多样性，并致力于为所有员工创造包容的工作环境。所有招聘决策均基于候选人的资质、能力及业务需求做出。

1、公司介绍 About Kiwimoore: Kiwimoore is at the forefront of the semiconductor industry, pushing the boundaries with our innovative Chiplet technology. We are dedicated to advancing computing through a culture of collaboration, innovation, and dynamic teamwork. As part of Kiwimoore, you will join a team committed to redefining the future of semiconductor technology with some of the brightest minds in the industry. 关于奇异摩尔（Kiwimoore） 奇异摩尔处于半导体行业前沿，凭借创新的芯粒（Chiplet）技术不断突破技术边界。我们秉持协作、创新与高效团队合作的文化，致力于推动计算技术的发展。加入奇异摩尔，你将与行业内的顶尖人才携手，共同重新定义半导体技术的未来。 福利待遇：六险一金，双休，定期体检，节假日福利，弹性工作~ Role Overview: It is for front-end RTL development covering in AI based Networking product IP and SoC development, including specification and architecture definition, RTL Coding, IP integration and design quality assurance, for our projects. We are responsible for delivering cutting-edge, custom SoC designs that can perform complex and high-performance functions in the most efficient manner. 工作地点：西安/上海 Responsibilities: 1. Develop design documents． 2. Write RTL code, meet the function target and have good performance/power/area efficiency． 3. Apply low power, DFT and other digital design techniques． 4. Work with DV team to improve test plan and debug failed tests． 5. Work with ME/BE team in synthesis, P&R and STA. 6. Complete Lint/CDC checks and timing closure. 7. Participate in silicon debug． Qualifications: basic requirements： 1. BS with 6+ years or MS with 3+ years of design engineering experience. 2. High proficient in Verilog/System Verilog coding constructs. 3. Knowledge of front-end tools and flow (Verilog simulators, Connectivity tools, Lint/CDC checkers, low power static checkers) ． 4. Strong understanding of CDC and timing closure. Additional Preferred one or more of these Requirements: 1. Experience with AMBA protocols (CHI, CXS, AXI, AHB) and fabric (XBAR, NIC, NOC) design or third-party IP integration. 2. Experience in Ethernet, RDMA, DPU and AI networking development. 3. Ability to write scripts using Perl, Tcl, Python etc. 4. Familiarity with Synthesis and STA tools is a plus. 5. Good verbal and written communication skills. What Kiwimoore Offers: 1.A competitive salary and comprehensive benefits package. 2.Career growth opportunities in an innovative and dynamic field. 3.A creative, inclusive, and collaborative work environment. 4.The opportunity to be part of a pioneering team revolutionizing technology. How to Apply: If you are a dynamic professional looking to impact the tech world , apply now! Submit your application through our careers page, including a resume and a cover letter explaining why you are the perfect fit for the Design Engineer at Kiwimoore. Kiwimoore is an equal opportunity employer. We value diversity and are committed to creating an inclusive environment for all employees. All employment is decided based on qualifications, merit, and business need. 岗位概述 该岗位负责前端 RTL（寄存器传输级）开发，涵盖基于人工智能（AI）的网络产品 IP（知识产权）与 SoC（系统级芯片）开发工作，具体包括需求规格与架构定义、RTL 代码编写、IP 集成及设计质量保障，以支撑公司相关项目。我们的职责是交付具备尖端技术的定制化 SoC 设计，确保其能以最高效的方式实现复杂且高性能的功能。 岗位职责 1、编写设计文档。 2、编写 RTL 代码，满足功能目标，并确保良好的性能、功耗与面积（PPA）效率。 3、应用低功耗设计、可测试性设计（DFT）及其他数字设计技术。 4、与验证（DV）团队协作，完善测试计划并调试失败的测试案例。 5、与前端 / 后端（FE/BE）团队配合，开展综合（Synthesis）、布局布线（P&R）及静态时序分析（STA）工作。 6、完成代码检查（Lint）、跨时钟域（CDC）检查及时序收敛（Timing Closure）。 7、参与芯片（Silicon）调试工作。 任职要求--基本要求 1、本科及以上学历，本科需具备 6 年以上设计工程经验，硕士需具备 3 年以上设计工程经验。 2、精通 Verilog/System Verilog 硬件描述语言的编码规范与技巧。 3、熟悉前端设计工具与流程（包括 Verilog 仿真器、连接性分析工具、Lint/CDC 检查工具、低功耗静态检查工具）。 4、深入理解跨时钟域（CDC）设计与时序收敛（Timing Closure）相关知识。 优先要求（满足以下一项或多项者优先） 1、具备 AMBA 协议（如 CHI、CXS、AXI、AHB）及总线架构（如交叉开关 XBAR、网络接口控制器 NIC、片上网络 NOC）设计经验，或第三方 IP 集成经验。 2、拥有以太网（Ethernet）、远程直接数据存取（RDMA）、数据处理单元（DPU）及 AI 网络领域开发经验。 3、具备使用 Perl、Tcl、Python 等脚本语言编写工具脚本的能力。 4、熟悉综合（Synthesis）与静态时序分析（STA）工具者优先。 5、具备良好的口头与书面沟通能力。 我们可以给到您 具有竞争力的薪资及全面的福利体系。 在创新且充满活力的领域中，提供广阔的职业发展机会。 富有创造力、包容性与协作精神的工作环境。 加入先锋团队，参与技术变革的宝贵机会。 申请方式 若你是充满活力、渴望在科技领域创造影响力的专业人士，欢迎立即申请！请通过我们的招聘官网提交申请，申请材料需包含个人简历及求职信，求职信需说明你为何是奇维摩尔设计工程师岗位的理想人选。 奇异摩尔是一家倡导平等就业机会的雇主。我们重视多样性，并致力于为所有员工创造包容的工作环境。所有招聘决策均基于候选人的资质、能力及业务需求做出。

1、公司介绍 About Kiwimoore: Kiwimoore is at the forefront of the semiconductor industry, pushing the boundaries with our innovative Chiplet technology. We are dedicated to advancing computing through a culture of collaboration, innovation, and dynamic teamwork. As part of Kiwimoore, you will join a team committed to redefining the future of semiconductor technology with some of the brightest minds in the industry. 关于奇异摩尔（Kiwimoore） 奇异摩尔处于半导体行业前沿，凭借创新的芯粒（Chiplet）技术不断突破技术边界。我们秉持协作、创新与高效团队合作的文化，致力于推动计算技术的发展。加入奇异摩尔，你将与行业内的顶尖人才携手，共同重新定义半导体技术的未来。 福利待遇：六险一金，双休，定期体检，节假日福利，弹性工作~ 工作地点：西安/上海 上海：浦东新区奇异摩尔 西安：高新区中国人寿壹中心 Job description Responsible for the front-end/back-end verification of the company's chip projects, mainly focusing on SoC and system verification; Responsible for verification plan formulation, environment construction, incentive generation and coverage analysis, support software and hardware collaborative verification; Responsible for the development and maintenance of verification environment and process. Job requirements BS with 5+ years or MS with 3+ years in ASIC verification Familiar with chip development/verification process, proficient in verification related EDA tools, skilled in UVM and other mainstream verification methodology; Proficient in SystemVerilog hardware design language, familiar with one or more of C/C++/SystemC modeling languages, familiar with python/perl scripting languages; Can independently build verification platform, complete IP subsys/SOC level verification, test point decomposition, code/function coverage analysis and other work. One or more of the following validations are preferred: ARM/RISCV/DSP processor related experience; Familiar with common interconnection bus such as AMBA protocol; Familiar with the commonly used IP, such as NIC/NOC/UART/SPI, I2C/WDT/PVT/JTAG/GPIO, etc.; Familiar with high-speed interface PCIE/DDR protocol; Experience in FPGA prototype verification /emulation verification; Experience in back-end netlist simulation; Familiar with Linux environment, Perl/Python scripting ability is a plus. Good verbal and written communication skills. What Kiwimoore Offers: 1.A competitive salary and comprehensive benefits package. 2.Career growth opportunities in an innovative and dynamic field. 3.A creative, inclusive, and collaborative work environment. 4.The opportunity to be part of a pioneering team revolutionizing technology. How to Apply: If you are a dynamic professional looking to impact the tech world , apply now! Submit your application through our careers page, including a resume and a cover letter explaining why you are the perfect fit for the Design Engineer at Kiwimoore. Kiwimoore is an equal opportunity employer. We value diversity and are committed to creating an inclusive environment for all employees. All employment is decided based on qualifications, merit, and business need. 岗位职责 1、负责公司芯片项目的前端 / 后端验证工作，重点聚焦于系统级芯片（SoC）及系统层面的验证； 2、负责制定验证计划、搭建验证环境、生成激励信号并开展覆盖率分析，支持软硬件协同验证； 3、负责验证环境与验证流程的开发及维护工作。 任职要求 1、本科及以上学历，本科需具备 5 年以上专用集成电路（ASIC）验证经验，硕士需具备 3 年以上专用集成电路（ASIC）验证经验； 2、熟悉芯片开发及验证流程，精通验证相关的电子设计自动化（EDA）工具，熟练掌握通用验证方法学（UVM）等主流验证方法； 3、精通 SystemVerilog 硬件设计语言，熟悉 C/C++/SystemC 建模语言中的一种或多种，了解 Python/Perl 脚本语言； 4、能够独立搭建验证平台，完成 IP 子系统 / 系统级芯片（SoC）层面的验证、测试点拆解及代码 / 功能覆盖率分析等工作。 5、满足以下任一项或多项验证相关经验者优先 6、具备 ARM/RISCV/DSP 处理器相关验证经验； 7、熟悉 AMBA 协议等常用互联总线； 8、熟悉各类常用 IP，如网络接口控制器（NIC）、片上网络（NOC）、通用异步收发传输器（UART）、串行外设接口（SPI）、集成电路总线（I2C）、看门狗定时器（WDT）、工艺 - 电压 - 温度（PVT）、联合测试行动小组（JTAG）、通用输入输出（GPIO）等； 9、熟悉高速接口 PCIE/DDR 协议； 10、具备现场可编程门阵列（FPGA）原型验证 / 仿真验证经验； 11、具备后端网表仿真经验； 12、熟悉 Linux 操作系统环境，具备 Perl/Python 脚本编写能力者优先； 13、具备良好的口头及书面沟通能力。 我们可以给到您 具有竞争力的薪资及全面的福利体系。 在创新且充满活力的领域中，提供广阔的职业发展机会。 富有创造力、包容性与协作精神的工作环境。 加入先锋团队，参与技术变革的宝贵机会。 申请方式 若你是充满活力、渴望在科技领域创造影响力的专业人士，欢迎立即申请！请通过我们的招聘官网提交申请，申请材料需包含个人简历及求职信，求职信需说明你为何是奇维摩尔设计工程师岗位的理想人选。 奇异摩尔是一家倡导平等就业机会的雇主。我们重视多样性，并致力于为所有员工创造包容的工作环境。所有招聘决策均基于候选人的资质、能力及业务需求做出。

1、公司介绍 About Kiwimoore: Kiwimoore is at the forefront of the semiconductor industry, pushing the boundaries with our innovative Chiplet technology. We are dedicated to advancing computing through a culture of collaboration, innovation, and dynamic teamwork. As part of Kiwimoore, you will join a team committed to redefining the future of semiconductor technology with some of the brightest minds in the industry. 关于奇异摩尔（Kiwimoore） 奇异摩尔处于半导体行业前沿，凭借创新的芯粒（Chiplet）技术不断突破技术边界。我们秉持协作、创新与高效团队合作的文化，致力于推动计算技术的发展。加入奇异摩尔，你将与行业内的顶尖人才携手，共同重新定义半导体技术的未来。 福利待遇：六险一金，双休，定期体检，节假日福利，弹性工作~ 工作地点：西安/上海 上海：浦东新区奇异摩尔 西安：高新区中国人寿壹中心 Job description Responsible for the front-end/back-end verification of the company's chip projects, mainly focusing on SoC and system verification; Responsible for verification plan formulation, environment construction, incentive generation and coverage analysis, support software and hardware collaborative verification; Responsible for the development and maintenance of verification environment and process. Job requirements BS with 5+ years or MS with 3+ years in ASIC verification Familiar with chip development/verification process, proficient in verification related EDA tools, skilled in UVM and other mainstream verification methodology; Proficient in SystemVerilog hardware design language, familiar with one or more of C/C++/SystemC modeling languages, familiar with python/perl scripting languages; Can independently build verification platform, complete IP subsys/SOC level verification, test point decomposition, code/function coverage analysis and other work. One or more of the following validations are preferred: ARM/RISCV/DSP processor related experience; Familiar with common interconnection bus such as AMBA protocol; Familiar with the commonly used IP, such as NIC/NOC/UART/SPI, I2C/WDT/PVT/JTAG/GPIO, etc.; Familiar with high-speed interface PCIE/DDR protocol; Experience in FPGA prototype verification /emulation verification; Experience in back-end netlist simulation; Familiar with Linux environment, Perl/Python scripting ability is a plus. Good verbal and written communication skills. What Kiwimoore Offers: 1.A competitive salary and comprehensive benefits package. 2.Career growth opportunities in an innovative and dynamic field. 3.A creative, inclusive, and collaborative work environment. 4.The opportunity to be part of a pioneering team revolutionizing technology. How to Apply: If you are a dynamic professional looking to impact the tech world , apply now! Submit your application through our careers page, including a resume and a cover letter explaining why you are the perfect fit for the Design Engineer at Kiwimoore. Kiwimoore is an equal opportunity employer. We value diversity and are committed to creating an inclusive environment for all employees. All employment is decided based on qualifications, merit, and business need. 岗位职责 1、负责公司芯片项目的前端 / 后端验证工作，重点聚焦于系统级芯片（SoC）及系统层面的验证； 2、负责制定验证计划、搭建验证环境、生成激励信号并开展覆盖率分析，支持软硬件协同验证； 3、负责验证环境与验证流程的开发及维护工作。 任职要求 1、本科及以上学历，本科需具备 5 年以上专用集成电路（ASIC）验证经验，硕士需具备 3 年以上专用集成电路（ASIC）验证经验； 2、熟悉芯片开发及验证流程，精通验证相关的电子设计自动化（EDA）工具，熟练掌握通用验证方法学（UVM）等主流验证方法； 3、精通 SystemVerilog 硬件设计语言，熟悉 C/C++/SystemC 建模语言中的一种或多种，了解 Python/Perl 脚本语言； 4、能够独立搭建验证平台，完成 IP 子系统 / 系统级芯片（SoC）层面的验证、测试点拆解及代码 / 功能覆盖率分析等工作。 5、满足以下任一项或多项验证相关经验者优先 6、具备 ARM/RISCV/DSP 处理器相关验证经验； 7、熟悉 AMBA 协议等常用互联总线； 8、熟悉各类常用 IP，如网络接口控制器（NIC）、片上网络（NOC）、通用异步收发传输器（UART）、串行外设接口（SPI）、集成电路总线（I2C）、看门狗定时器（WDT）、工艺 - 电压 - 温度（PVT）、联合测试行动小组（JTAG）、通用输入输出（GPIO）等； 9、熟悉高速接口 PCIE/DDR 协议； 10、具备现场可编程门阵列（FPGA）原型验证 / 仿真验证经验； 11、具备后端网表仿真经验； 12、熟悉 Linux 操作系统环境，具备 Perl/Python 脚本编写能力者优先； 13、具备良好的口头及书面沟通能力。 我们可以给到您 具有竞争力的薪资及全面的福利体系。 在创新且充满活力的领域中，提供广阔的职业发展机会。 富有创造力、包容性与协作精神的工作环境。 加入先锋团队，参与技术变革的宝贵机会。 申请方式 若你是充满活力、渴望在科技领域创造影响力的专业人士，欢迎立即申请！请通过我们的招聘官网提交申请，申请材料需包含个人简历及求职信，求职信需说明你为何是奇维摩尔设计工程师岗位的理想人选。 奇异摩尔是一家倡导平等就业机会的雇主。我们重视多样性，并致力于为所有员工创造包容的工作环境。所有招聘决策均基于候选人的资质、能力及业务需求做出。

1、公司介绍 About Kiwimoore: Kiwimoore is at the forefront of the semiconductor industry, pushing the boundaries with our innovative Chiplet technology. We are dedicated to advancing computing through a culture of collaboration, innovation, and dynamic teamwork. As part of Kiwimoore, you will join a team committed to redefining the future of semiconductor technology with some of the brightest minds in the industry. 关于奇异摩尔（Kiwimoore） 奇异摩尔处于半导体行业前沿，凭借创新的芯粒（Chiplet）技术不断突破技术边界。我们秉持协作、创新与高效团队合作的文化，致力于推动计算技术的发展。加入奇异摩尔，你将与行业内的顶尖人才携手，共同重新定义半导体技术的未来。 福利待遇：六险一金，双休，定期体检，节假日福利，弹性工作~ 工作地点：西安/上海 Role Overview: Kiwimoore is looking for an experienced Senior SOC Architect who can translate market demands into product features and technical specifications. This role involves everything from application scenario analysis and product definition to SOC chip solution implementation. The ideal candidate should have a strong background in chip architecture design, performance modeling, low-power design, and be skilled in overseeing the entire chip development process. Location: Shanghai/Xi’An Responsibilities: · Interpret market demands to plan product features and technical specifications. · Engage in the full scope from application scenario analysis/product definition to specific SOC chip solution implementation. · Take charge of chip architecture design, performance modeling, performance analysis, low-power design, and top-level architecture and microarchitecture design. · Oversee the writing and review of architecture design documents and module-level detailed design documents. · Manage key IP selection and requirement analysis. · Participate in the entire flow from microarchitecture to full chip RTL implementation. · Engage in IP module verification and SOC system verification. Minimum Qualifications: · Master’s degree or higher in Computer Architecture, Microelectronics, Electronics, or related fields. · At least eight years of experience in SOC design and SOC architecture design, with at least two successful chip designs brought to mass production. · Proficiency in low-power design, including knowledge of clock/reset, boot-up, and debug designs. · In-depth understanding and experience in PPA (Power, Performance, Area) optimization, particularly in low-power design and optimization. · Strong sense of responsibility, excellent communication, coordination skills, and team spirit. Preferred Qualifications: Expertise in one or more of the following areas: · In-depth knowledge of D2D/C2C protocols such as PCIe, CCIX, CXL, UCI, with experience leading the development of high-end server chips and multi-core interconnect architectures. · Profound understanding of bus protocols like AXI, ACE, CHI, and experience with bus interconnects such as Ncore, FlexNoC, NIC. · Proficiency in performance modeling for server-class or AI accelerator chips, with the ability to lead full-chip modeling initiatives. · Expertise in DDR system architecture and familiar with DDR4, DDR5, LPDDR4, LPDDR5 protocols. · Familiarity with Ethernet, RDMA, IB, RoCE V2 protocols, and experience in RDMA network architecture design and development. · Experience in Chiplet chip development and mass production. What Kiwimoore Offers: · A competitive salary and comprehensive benefits package. · Career growth opportunities in an innovative and dynamic field. · A creative, inclusive, and collaborative work environment. · The opportunity to be part of a pioneering team revolutionizing technology. How to Apply: If you are passionate about SOC architecture and ready to play a pivotal role in the next generation of Chiplet technology, Kiwimoore invites you to apply. Please submit your application through our careers page, including your resume and a personalized cover letter detailing why you are the perfect fit for the Senior SOC Architect role. Kiwimoore is an equal opportunity employer, dedicated to fostering diversity and inclusion. We welcome candidates from all backgrounds to apply, irrespective of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. 工作职责： 解读市场需求，规划产品功能与技术规格； 全程参与从应用场景分析、产品定义到具体 SOC 芯片解决方案落地的全流程工作； 负责芯片架构设计、性能建模、性能分析、低功耗设计，以及顶层架构与微架构设计； 统筹架构设计文档及模块级详细设计文档的撰写与审核工作； 负责关键 IP（知识产权）的选型与需求分析； 参与从微架构设计到全芯片 RTL（寄存器传输级）实现的完整流程； 参与 IP 模块验证及 SOC 系统验证工作； 基本任职要求： 计算机体系结构、微电子、电子等相关专业硕士及以上学历； 拥有至少 8 年 SOC 设计及 SOC 架构设计经验，且至少主导过 2 款成功量产的芯片设计项目； 精通低功耗设计，熟悉时钟 / 复位、启动及调试设计相关知识； 深入理解并具备 PPA（功耗、性能、面积）优化经验，尤其在低功耗设计与优化领域； 责任心强，具备出色的沟通协调能力及团队协作精神； 优先任职要求： 具备以下一个或多个领域的专业专长： 深入掌握 PCIe、CCIX、CXL、UCI 等 D2D/C2C 协议，拥有高端服务器芯片及多核互连架构开发主导经验； 深刻理解 AXI、ACE、CHI 等总线协议，具备 Ncore、FlexNoC、NIC 等总线互连相关经验； 精通服务器级或 AI 加速芯片的性能建模，能够主导全芯片建模工作； 专长于 DDR 系统架构，熟悉 DDR4、DDR5、LPDDR4、LPDDR5 协议； 熟悉以太网、RDMA、IB、RoCE V2 协议，具备 RDMA 网络架构设计与开发经验； 拥有芯粒（Chiplet）芯片开发及量产经验； （Kiwimoore）提供： 具有竞争力的薪资及全面的福利体系； 在创新且充满活力的领域中获得职业发展机会； 富有创造力、包容性及协作性的工作环境； 加入开创性团队，参与技术变革的宝贵机会；

1、公司介绍 About Kiwimoore: Kiwimoore is at the forefront of the semiconductor industry, pushing the boundaries with our innovative Chiplet technology. We are dedicated to advancing computing through a culture of collaboration, innovation, and dynamic teamwork. As part of Kiwimoore, you will join a team committed to redefining the future of semiconductor technology with some of the brightest minds in the industry. 关于奇异摩尔（Kiwimoore） 奇异摩尔处于半导体行业前沿，凭借创新的芯粒（Chiplet）技术不断突破技术边界。我们秉持协作、创新与高效团队合作的文化，致力于推动计算技术的发展。加入奇异摩尔，你将与行业内的顶尖人才携手，共同重新定义半导体技术的未来。 福利待遇：六险一金，双休，定期体检，节假日福利，弹性工作~ 工作地点：西安/上海 Role Overview: Kiwimoore is looking for an experienced Senior SOC Architect who can translate market demands into product features and technical specifications. This role involves everything from application scenario analysis and product definition to SOC chip solution implementation. The ideal candidate should have a strong background in chip architecture design, performance modeling, low-power design, and be skilled in overseeing the entire chip development process. Location: Shanghai/Xi’An Responsibilities: · Interpret market demands to plan product features and technical specifications. · Engage in the full scope from application scenario analysis/product definition to specific SOC chip solution implementation. · Take charge of chip architecture design, performance modeling, performance analysis, low-power design, and top-level architecture and microarchitecture design. · Oversee the writing and review of architecture design documents and module-level detailed design documents. · Manage key IP selection and requirement analysis. · Participate in the entire flow from microarchitecture to full chip RTL implementation. · Engage in IP module verification and SOC system verification. Minimum Qualifications: · Master’s degree or higher in Computer Architecture, Microelectronics, Electronics, or related fields. · At least eight years of experience in SOC design and SOC architecture design, with at least two successful chip designs brought to mass production. · Proficiency in low-power design, including knowledge of clock/reset, boot-up, and debug designs. · In-depth understanding and experience in PPA (Power, Performance, Area) optimization, particularly in low-power design and optimization. · Strong sense of responsibility, excellent communication, coordination skills, and team spirit. Preferred Qualifications: Expertise in one or more of the following areas: · In-depth knowledge of D2D/C2C protocols such as PCIe, CCIX, CXL, UCI, with experience leading the development of high-end server chips and multi-core interconnect architectures. · Profound understanding of bus protocols like AXI, ACE, CHI, and experience with bus interconnects such as Ncore, FlexNoC, NIC. · Proficiency in performance modeling for server-class or AI accelerator chips, with the ability to lead full-chip modeling initiatives. · Expertise in DDR system architecture and familiar with DDR4, DDR5, LPDDR4, LPDDR5 protocols. · Familiarity with Ethernet, RDMA, IB, RoCE V2 protocols, and experience in RDMA network architecture design and development. · Experience in Chiplet chip development and mass production. What Kiwimoore Offers: · A competitive salary and comprehensive benefits package. · Career growth opportunities in an innovative and dynamic field. · A creative, inclusive, and collaborative work environment. · The opportunity to be part of a pioneering team revolutionizing technology. How to Apply: If you are passionate about SOC architecture and ready to play a pivotal role in the next generation of Chiplet technology, Kiwimoore invites you to apply. Please submit your application through our careers page, including your resume and a personalized cover letter detailing why you are the perfect fit for the Senior SOC Architect role. Kiwimoore is an equal opportunity employer, dedicated to fostering diversity and inclusion. We welcome candidates from all backgrounds to apply, irrespective of race, religion, color, national origin, gender, sexual orientation, age, marital status, veteran status, or disability status. 工作职责： 解读市场需求，规划产品功能与技术规格； 全程参与从应用场景分析、产品定义到具体 SOC 芯片解决方案落地的全流程工作； 负责芯片架构设计、性能建模、性能分析、低功耗设计，以及顶层架构与微架构设计； 统筹架构设计文档及模块级详细设计文档的撰写与审核工作； 负责关键 IP（知识产权）的选型与需求分析； 参与从微架构设计到全芯片 RTL（寄存器传输级）实现的完整流程； 参与 IP 模块验证及 SOC 系统验证工作； 基本任职要求： 计算机体系结构、微电子、电子等相关专业硕士及以上学历； 拥有至少 8 年 SOC 设计及 SOC 架构设计经验，且至少主导过 2 款成功量产的芯片设计项目； 精通低功耗设计，熟悉时钟 / 复位、启动及调试设计相关知识； 深入理解并具备 PPA（功耗、性能、面积）优化经验，尤其在低功耗设计与优化领域； 责任心强，具备出色的沟通协调能力及团队协作精神； 优先任职要求： 具备以下一个或多个领域的专业专长： 深入掌握 PCIe、CCIX、CXL、UCI 等 D2D/C2C 协议，拥有高端服务器芯片及多核互连架构开发主导经验； 深刻理解 AXI、ACE、CHI 等总线协议，具备 Ncore、FlexNoC、NIC 等总线互连相关经验； 精通服务器级或 AI 加速芯片的性能建模，能够主导全芯片建模工作； 专长于 DDR 系统架构，熟悉 DDR4、DDR5、LPDDR4、LPDDR5 协议； 熟悉以太网、RDMA、IB、RoCE V2 协议，具备 RDMA 网络架构设计与开发经验； 拥有芯粒（Chiplet）芯片开发及量产经验； （Kiwimoore）提供： 具有竞争力的薪资及全面的福利体系； 在创新且充满活力的领域中获得职业发展机会； 富有创造力、包容性及协作性的工作环境； 加入开创性团队，参与技术变革的宝贵机会；

1、公司介绍 About Kiwimoore: Kiwimoore is at the forefront of the semiconductor industry, pushing the boundaries with our innovative Chiplet technology. We are dedicated to advancing computing through a culture of collaboration, innovation, and dynamic teamwork. As part of Kiwimoore, you will join a team committed to redefining the future of semiconductor technology with some of the brightest minds in the industry. 关于奇异摩尔（Kiwimoore） 奇异摩尔处于半导体行业前沿，凭借创新的芯粒（Chiplet）技术不断突破技术边界。我们秉持协作、创新与高效团队合作的文化，致力于推动计算技术的发展。加入奇异摩尔，你将与行业内的顶尖人才携手，共同重新定义半导体技术的未来。 福利待遇：六险一金，双休，定期体检，节假日福利，弹性工作~ 工作地点：地点不限，可居家办公，弹性 职位概述 我们正在寻找一位具备网络与人工智能（AI）行业背景的商务拓展总监，主要负责开拓和维护与行业头部客户（包括运营商、云厂商、大型科研机构等）的合作关系，推动公司网络与 AI 相关产品和解决方案的市场落地与推广。您将与产品、技术支持以及销售团队紧密协作，充分利用自身在 AI 及网络领域的资源和经验，助力公司实现业务目标并提升行业影响力。 主要工作内容 1. 客户关系管理与项目开拓 •建立并维护与行业头部客户（如运营商、云厂商、大型科研机构）长期稳定的合作关系。 • 根据公司战略和业务目标，完成既定的项目开拓指标，积极拓展 AI 与网络解决方案在目标行业的应用。 2. 新产品推广与落地 • 与产品团队、技术支持团队协同合作，推动公司新一代网络与 AI 产品在目标客户环境中的验证与部署。 • 深入理解客户在AI、网络互联、数据中心加速等方面的需求，制定并执行切实可行的产品推广策略。 3. 行业影响力拓展 • 代表公司参与行业研讨会、技术论坛和合作交流活动，提升公司在 AI 与网络领域的品牌知名度。 • 持续关注 AI 行业的最新动态，为公司提供洞察与趋势分析，推动行业影响力提升。 4. 销售协作与业绩达成 • 与销售团队紧密配合，推进重点项目的商务谈判与签约，保障项目顺利落地。 • 配合销售团队完成销售指标，提供商业策略与资源支持，为客户打造最佳解决方案。 任职要求 1. 工作经验 •10年以上商务拓展或大客户管理经验，在网络或人工智能（AI）行业有深厚积累者优先。 2. 行业资源 •熟悉运营商、云厂商和/或大型科研机构领域，拥有丰富的人脉资源并能迅速建立信任与合作关系。 3. 商务拓展能力 •具备卓越的商务谈判与沟通技巧，可在复杂的技术与商业环境中推动项目进展并达成合作。 4. 技术背景（加分项） •具备网络互联、数据中心、人工智能或分布式存储等相关技术背景，对产品原理和市场趋势有深入理解。 5. 自驱力与执行力 •具备强烈的自我驱动力和独立完成任务的能力，能够在压力和竞争环境下高效达成目标 为何加入我们？ • 尖端技术：采用业界领先的网络解决方案，为全球最先进的数据中心提供动力。 • 影响与冲击：塑造顶级企业将在全球范围内使用的产品和解决方案的发展方向。 • 职业发展：领导一支才华横溢且充满激情的团队，同时提升自己的技术专业知识和领导能力。 • 动态环境：在快节奏、创新的环境中与跨职能团队合作。 加入我们，共同推动网络解决方案的未来发展，为下一代数据中心架构带来深远影响！

1、公司介绍 About Kiwimoore: Kiwimoore is at the forefront of the semiconductor industry, pushing the boundaries with our innovative Chiplet technology. We are dedicated to advancing computing through a culture of collaboration, innovation, and dynamic teamwork. As part of Kiwimoore, you will join a team committed to redefining the future of semiconductor technology with some of the brightest minds in the industry. 关于奇异摩尔（Kiwimoore） 奇异摩尔处于半导体行业前沿，凭借创新的芯粒（Chiplet）技术不断突破技术边界。我们秉持协作、创新与高效团队合作的文化，致力于推动计算技术的发展。加入奇异摩尔，你将与行业内的顶尖人才携手，共同重新定义半导体技术的未来。 福利待遇：六险一金，双休，定期体检，节假日福利，弹性工作~ 工作地点：地点不限，可居家办公，弹性 职位概述 我们正在寻找一位具备网络与人工智能（AI）行业背景的商务拓展总监，主要负责开拓和维护与行业头部客户（包括运营商、云厂商、大型科研机构等）的合作关系，推动公司网络与 AI 相关产品和解决方案的市场落地与推广。您将与产品、技术支持以及销售团队紧密协作，充分利用自身在 AI 及网络领域的资源和经验，助力公司实现业务目标并提升行业影响力。 主要工作内容 1. 客户关系管理与项目开拓 •建立并维护与行业头部客户（如运营商、云厂商、大型科研机构）长期稳定的合作关系。 • 根据公司战略和业务目标，完成既定的项目开拓指标，积极拓展 AI 与网络解决方案在目标行业的应用。 2. 新产品推广与落地 • 与产品团队、技术支持团队协同合作，推动公司新一代网络与 AI 产品在目标客户环境中的验证与部署。 • 深入理解客户在AI、网络互联、数据中心加速等方面的需求，制定并执行切实可行的产品推广策略。 3. 行业影响力拓展 • 代表公司参与行业研讨会、技术论坛和合作交流活动，提升公司在 AI 与网络领域的品牌知名度。 • 持续关注 AI 行业的最新动态，为公司提供洞察与趋势分析，推动行业影响力提升。 4. 销售协作与业绩达成 • 与销售团队紧密配合，推进重点项目的商务谈判与签约，保障项目顺利落地。 • 配合销售团队完成销售指标，提供商业策略与资源支持，为客户打造最佳解决方案。 任职要求 1. 工作经验 •10年以上商务拓展或大客户管理经验，在网络或人工智能（AI）行业有深厚积累者优先。 2. 行业资源 •熟悉运营商、云厂商和/或大型科研机构领域，拥有丰富的人脉资源并能迅速建立信任与合作关系。 3. 商务拓展能力 •具备卓越的商务谈判与沟通技巧，可在复杂的技术与商业环境中推动项目进展并达成合作。 4. 技术背景（加分项） •具备网络互联、数据中心、人工智能或分布式存储等相关技术背景，对产品原理和市场趋势有深入理解。 5. 自驱力与执行力 •具备强烈的自我驱动力和独立完成任务的能力，能够在压力和竞争环境下高效达成目标 为何加入我们？ • 尖端技术：采用业界领先的网络解决方案，为全球最先进的数据中心提供动力。 • 影响与冲击：塑造顶级企业将在全球范围内使用的产品和解决方案的发展方向。 • 职业发展：领导一支才华横溢且充满激情的团队，同时提升自己的技术专业知识和领导能力。 • 动态环境：在快节奏、创新的环境中与跨职能团队合作。 加入我们，共同推动网络解决方案的未来发展，为下一代数据中心架构带来深远影响！